FACULTY Professor
Embedded System-on-Chip Laboratory
Ki-Seok Chung Professor

Digital Logic Design, Embedded System Design, VLSI Design, Computer Architecture

SoC Architecture, SoC Design Methodology, Low Power System Design

Ph.D., University of Illinois, Urbana-Champaign, USA
2004.3 ~ Present Professor at Hanyang University
2001.9 ~ 2004.2 Assistant Professor at Hongik University
2000.7 ~ 2001.8 Staff Engineering at Intel Corp.CA, USA
1998.7 ~ 2000.6 Senior R&D Engineer at Synopsys, Inc.CA, USA
1997.9 ~ 1998.5 Lecturer at Univ.of Illinois at Urbana-



Embedded System-on-Chip Laboratory

1. System-level Power Management
- Power management for multi-core CPUs
- Power management for mobile GPUs
- Power management framework for mobile platforms
- Power management interface development for Linus and
Android environment
- Programming model-driven power management
2. Parallelization using GPUs and Multi-Core CPUs
- Parallelization of entropy decoding using OpenMP based
implementation of multi-threaded syntax element partitioning
- Parallelization of the entire H.264/AVC decoding process utilizing
both thread scheduling and simultaneous multi-threading
- Parallel implementation of LDPC decoding using both
CUDA and OpenMP on heterogeneous multicore systems
3. SoC Platform-based Verification Method
- Various IP verification experiences using MentorGraphics’
Veloce emulation system
- Cortex-M0 Platform IP - H.264/AVC Decoder IP
- Control Area Network IP - JPEG - FFT 256
- IP verification method using Xilinx Zynq 7000 series
4. Digital CMOS IP Design for Communication
- Low power CMOS digital interface circuits
- Hardware IPs for decoding error correcting codes
- High performance and low power on-chip interconnection design
- Dynamically reconfigurable arithmetic units for DSPs


Embedded Software for Multi-core Systems, Low Power
Design Methodology, Reliable Communication and DSP
System, Parallel Programming Framework