FACULTY Professor
iSoC Laboratory
Jae-myung Lim Professor
Subject

MICROELECTRONICCIRCUITS, SOC Design

Education
Ph.D in Georgia Intitute of Technology
Career
2022.3 – Present Assistant Professor, Dept. of Electronic Engineering, Hanyang University, Seoul, Korea
2017.2 – 2022.2 Apple Inc.

iSoC Laboratory

 

 


■ Sensor interface IC
- Wireless readout system
- Low power ADC
- Low power wireless communication
- Ultrasound imaging system 

 

 

 

■ Power management IC
- Wireless Power Transmission (WPT)
- Low drop-out regulator (LDO)
- Digital LDO
- DCDC converter
- Low-cost high-efficiency rectifier
■ Design methodology & automation
- Design validation flow automation
- SRAM design
- In-memory computing (IMC)
- Low leakage control circuit
- Sub-threshold circuit design
- Sense amplifier optimization

 





 

 

 

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